Cache pre-fetching improves hit rates in cache memories. In this paper we are testing the effectiveness of Markov pre-fetching scheme based on Markov models in order to predict memory references that will cause a miss in L1 cache. Our experiments show that Markov history table size of 32 is sufficient and a pre-fetch buffer size of eight can help achieve hit rates of up to twenty percent in L1 miss stream depending on the locality of reference present in instruction and data set of the application.